Floating Point Coprocessors :: essays research papers

Floating Point Co processorsThe designer of any microprocessor would like to elicit its instructionset almost infinitely only if is limited by the quantity of silicon available ( nonto mention the problems of testability and complexity). Consequently, a realmicroprocessor represents a compromise between what is desirable and what isacceptable to the majority of the chips users. For example, the 68020microprocessor is not optimized for calculations that demand a large volume ofscientific (i.e. travel point) calculations. One method acting to significantlyenhance the performance of such a microprocessor is to add a coprocessor. Toincrease the power of a microprocessor, it does not suffice to add a few moreoperating instructions to the instruction set, but it involves adding an auxiliaryprocessor that works in parallel to the MPU (Micro Processing Unit). A systeminvolving at the same time operating processors can be very complex, since thereneed to be dedicated communication paths between the processors, as well as parcel to divide the tasks among them. A practical multiprocessing systemshould be as simple as possible and require a minimum operating cost in terms of bothhardware and software. There are respective(a) techniques of arranging a coprocessoralongside a microprocessor. One technique is to contribute the coprocessor with aninstruction interpreter and program counter. Each instruction fetched frommemory is examined by both the MPU and the coprocessor. If it is a MPUinstruction, the MPU executes it otherwise the coprocessor executes it. It canbe seen that this solution is feasible, but by no means simple, as it would bedifficult to maintenance the MPU and coprocessor in step. Another technique is to equipthe microprocessor with a special jalopy to communicate with the externalcoprocessor. Whenever the microprocessor encounters an operation that requiresthe intervention of the coprocessor, the special bus provides a dedicated high-speed communica tion between the MPU and the coprocessor. Once again, thissolution is not simple. There are more methods of connecting two (or more)concurrently operating processors, which allow be covered in more detail duringthe specific discussions of the Intel and Motorola floating point coprocessors.Motorola Floating Point Coprocessor (FPC) 68882The designers of the 68000-family coprocessors decided to implementcoprocessors that could work with animated and future generations ofmicroprocessors with minimal hardware and software overhead. The actual approachinterpreted by the Motorola engineers was to tightly couple the coprocessor to thehost microprocessor and to treat the coprocessor as a memory-mapped peripherallying inside the CPU address space. In effect, the MPU fetches instructions frommemory, and, if an instruction is a coprocessor instruction, the MPU passes it